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final data sheet, rev. 3.3, june 2008 tle 6251 g high speed can-transceiver with wake detection automotive power never stop thinking.
edition 2008-06-19 published by infineon technologies ag, st.-martin-strasse 53, 81669 mnchen, germany ? infineon technologies ag 2005. all rights reserved. attention please! the information herein is given to descri be certain components and shall not be cons idered as a guarantee of characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not lim ited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. information for further information on technology, de livery terms and conditions and prices please contact your nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements component s may contain dangerous substances. fo r information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-supp ort devices or systems with th e express written approval of infineon technologies, if a failure of such components can r easonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that de vice or system. life support devices or systems are intend ed to be implanted in the human body, or to support and/or mainta in and sustain and/or protect hu man life. if they fail, it is reasonable to assume that the health of th e user or other person s may be endangered.
type ordering code package tle 6251 g on request p-dso-14-13 high speed can-transceiv er with wake detection tle 6251 g p-dso-14-13 final data sheet 3 rev. 3.3, 2008-06-19 features ? can data transmission rate up to 1 mbaud ? compatible to iso/dis 11898 ? supports 12 v and 24 v automotive applications ? low power modes with local wake-up input and remote wake-u p via can bus ? very low power consumption in sleep mode ? wake-up input ? wake-up source recognition ? inhibit output to control an external power supply ? diagnosis output ? rxd only mode for node failure analysis ? split termination to stab ilize the recessive level ? txd time-out function with diagnosis ? rxd recessive clamping handler with diagnosis ? txd to rxd short circuit handler with diagnosis ? bus line short circuit diagnosis ? bus dominant clamping diagnosis ? undervoltage detection at v cc , v i/o and v bat ? cold start diagnosis (first battery connection) ? adaptive to host logic supply levels (3.3 and 5 v) ? wide common mode range for el ectromagnetic immunity (emi) ? low electromagnetic emission (eme) ? short circuit proof to ground, battery and v cc ? overtemperature protection ? protected against automotive transients ? +/- 6kv esd robustness according to iec 61000-4-2
final data sheet 4 rev. 3.3, 2008-06-19 tle 6251 g description the can-transceiver tle 6251 g is a monolithic integrated circuit in a p-dso-14-13 package for high speed differential mode data transmission (up to 1 mbaud) and reception in automotive and industrial applications . it works as an interface between the can protocol controller and the physical bus lines comp atible to iso/dis 11898. as a successor to the first generation of hs can, the tle 6251 g is designed to provide an excellent passive behavior when the transceiver is switched off (mixed networks, clamp15/30 applications). the current cons umption can be reduced, due to the low power modes.. this supports networks with pa rtially powered down nodes. the tle 6251 g offers two low power modes as well as a receive-only mode to support software diagnosis functions. a wake-up fro m the low power mode is possibl e via a message on the bus or via the bi-level se nsitive wake input. an external voltage supply ic can be controlled by the inhibit output. so, the c can be powered down and the tle 6251 g still reacts to wake-up activities on the can bus or local wake input. a diagnosis output allows mode dependent enhanced diagnos is of bus failures and wake-up source. a v bat fail flag reports an power-on c ondition at the battery supply input. the tle 6251 g is designed to withsta nd the severe conditions of automotive applications and to support 12 v and 24 v applications. the ic is based on the smart power technology spt ? which allows bipolar and cmos control circuitry in accordance with dmos power de vices existing on the same monolithic circuit.
tle 6251 g final data sheet 5 rev. 3.3, 2008-06-19 pin configuration aep03398.vsd 7 6 5 4 3 2 1 txd gnd v cc rxd v c en inh 8 9 10 11 12 13 14 canh canl split wk nerr nstb v s tle 6251 g (p-dso-14-13) figure 1 pin configuration (top view) table 1 pin definitions and functions pin no. symbol function 1 txd can transmit data input; 20 k pull-up, low in dominant state 2 gnd ground 3 v cc 5 v supply input; block to gnd with 100 nf ceramic capacitor 4 rxd can receive data output; low in dominant stat e, push-pull output stage 5 v c logic voltage level adapter input; connect to pin v cc for 5 v microcontroller, connect to additional supply vol tage for other logic voltage levels, block to gnd with 100 nf cera mic capacitor 6 en mode control input 1; internal pul l-down, see figure 6 7 inh control output; set high to activate volta ge regulator; open drain 8 nerr diagnosis output 1; error and power on i ndication output, push-pull output stage 9 wk wake-up input; bi-level sensitive
final data sheet 6 rev. 3.3, 2008-06-19 tle 6251 g 10 v s battery voltage supply input; block to gnd with 100 nf ceramic capacitor 11 split termination output; to support the recessive voltage level of the bus lines (see table 2 ) 12 canl low line output; low in dominant state 13 canh high line output; high in dominant state 14 nstb mode control input 2; internal pull-down, see figure 6 table 1 pin definitions and functions (cont?d) pin no. symbol function
tle 6251 g final data sheet 7 rev. 3.3, 2008-06-19 functional block diagram tle 6251 g output stage receiver + bus failure detection aeb03397.vsd 14 rxd 4 mux = driver temp.- protection + timeout txd 1 diagnosis logic mode control logic 6 nstb en nerr 8 v c 5 7 inh wake-up logic 13 canh 12 canl 9 wk 3 v cc 10 v s 11 split 2 gnd v c figure 2 block diagram
final data sheet 8 rev. 3.3, 2008-06-19 tle 6251 g application information as a successor to the first generation of hs can, the tle 6251 g is designed to provide an excellent passive behavior when the transceiver is switched off (mixed networks, terminal 15/30 applications). the curre nt consumption can be reduced, due to the low power modes. this supports networks with pa rtially powered down nodes. a wake-up from the low power mode s is possible via a message on the bus or via the bi-level sensitive wake input wk. an exte rnal voltage supply ic can be controlled by the inhibit output inh. so, the c can be powered down and the tle 6251 g still reacts to wake-up activities on the can bus or local wake input activities. a diagnosis output pin nerr, allo ws mode dependent enhanced di agnosis of bus failures and wake-up source. a v bat fail flag reports a power-on conditi on at the battery supply input. the v bat fail flag will be resetted after the first transition into normal mode. the tle 6251 g has four operation modes, the normal , the receive only, the standby mode and the sleep mode. these modes can be controlled with the two contro l pins en and nstb pin (see figure 6 , table 2 ). both, en and nstb, have an implemen ted pull-down, so if there is no signal applied to en and nstb, th e transceiver automatically changes to the standby mode. normal mode to transfer the tle 6251 g into the normal mode, nstb and en have to be switched to high level. this mode is designed for the normal data transmission/reception within the hs-can network. transmission the signal from the c is applied to the txd input of the tle 6251 g. now the bus driver switches the canh/l output stages to transfer this input signal to the can bus lines. txd time-out feature if the txd signal is dominant for a time t > t txd , the txd time-out f unction deacti vates the transmission of the signal at th e bus. this is realized to pr event the bus from being blocked permanently due to an error. the transmission is released again, after a mode state change. txd to rxd short circuit feature similar to the txd time-out, a txd to rxd short circuit would also drive a permanent dominant signal at the bus and so block the co mmunication. to avoid this, the tle 6251 g has a txd to rxd short circuit detection.
tle 6251 g final data sheet 9 rev. 3.3, 2008-06-19 reduced electromagnetic emission the bus driver has an implemented control to reduce the electromagnetic emission (eme). this is achieved by controlling the symmetry of the slope, resp. of canh and canl. overtemperature the driver stages are protected against overtem perature. exceeding the shutdown temperature results in deactivation of the driving stages at canh/l. to avoid a bit failure after cooling down, the signals can be transmitted again only after a dominant to recessive edge at txd. figure 3 shows the way how the transmission stage is deactivated and activated again. first an overtemperature condition causes the transmission stage to deactivate. after the overtemperature condition is no longer present, the transmission is only possible after the txd bus signal has changed to recessive level. t failure overtemp v cc overtemperature gnd t txd v cc gnd canh aet03394.vsd t v cc v cc /2 dr r figure 3 release of the transmission after overtemperature
final data sheet 10 rev. 3.3, 2008-06-19 tle 6251 g reception the analog can bus signals are converted into a di gital signal at rxd via the differential input receiver. in normal mode and rxd only, the split pin is used to stabilize the recessive common mode signal. permanent recessive clamping if the rxd signal is permanent recessive, altho ugh there is a message sent on the bus, the host c of this transceiver could start a message at any tim e, because the bus seems to be idle. to prevent this node to disturb the communication on the bus, the tle 6251 g offers a so called permanent rxd recessive clamping. if the rxd signal is perm anent recessive, an error flag is set and the transmitter is deactivated as long as the error occurs receive only mode (rxonly mode) in the rxonly mode, the transmission stage is deactivated but the reception of signals via the can bus is still possible. this mode is implemented to support ha rdware and soft ware diagnosis functions. if there is an hardware error on the transmission pa rt of a node (e.g. bubbling idiot failure), in the rxonly mode, the bus is no longer blocked and the c can still receive the messages on the bus. it is also possible to make a network analysis of the inte rconnections between the nodes. a connection between two node s (in a network) is checked if both nodes are in the normal mode and all others are in rxonly mode . if a message from one node is sent to the other, this has to be acknowledged. if there is no acknowledge of the message, the connection between the two nodes has an error. the rxd pin also works as an diagnosis fl ag, which is describe d more in detail in table 2 .
tle 6251 g final data sheet 11 rev. 3.3, 2008-06-19 standby mode in the standby mode, transmission and reception of si gnals is deactivated. this is the first step of reducing the current consum ption. the internal voltage regulator control pin (inh) is still active, so all external (inh controlled) powered devices are also activated. wake-up the wake-up is possible vi a wk-pin (filtering time t > t wk ) or can message (filtering time t > t wu ) and sets the rxd/nerr pins to low, see figure 4 . now the c is able to detect this change at rxd and switch the transceiver into the normal mode. once the wake-up flag is set (= low), it remains in this state, as long as the transcei ver is not transferred into the normal mode. the detection of the wake-up source is possible during the first 4 recessive to dominant edges at txd in the normal mode. go-to sleep mode the go-to sleep mode is used to have an interm ediate step between the sleep mode a nd all other modes. this mode has to control if the sleep command (en = 1, nstb = 0) is activated for a minimum hold time t > t hslp . afterwards the tle 6251 g automatically transfers into the sleep mode. the activated features in go-to sl eep mode are similar to the standby mode. sleep mode in the sleep mode, transmission and reception of signals is deactivated. this is the second step of reducing the current consum ption. the internal voltage regulator control pin (inh ) is deactivated. transition into other modes during sleep mode transition from sleep into other modes is possible if v cc and v c active. selection of the modes can be done by the mode control inputs. wake-up the wake-up is possible vi a wk-pin (filtering time t > t wk ) or can message (filtering time t > t wu ) and automatically transfers the tle 6251 g into the standby mode and sets the rxd/nerr pins to low, see figure 4 . once the tle 6251 g has been set to the standby mode, the system voltage regulator is activated by the inhibit output inh, and the c restarts. now the c is able to detect this change at rxd and switch the transceiver into the normal mode. once the wake-up flag is set (= low), it remains in this state, as long as the transceiver is not transferred into the normal mode. the detection of the wake-up source is possible during the first 4 recessive to dominant edges at txd in the normal mode.
can_h can_l vdiff inh vcc/vio rxd nerr nstb/en c p.o.r. normal mode t wu bus off bus wait wake pattern device wake ecu wake ldo ramp up communication starts c set tle6251g to normal operation final data sheet 12 rev. 3.3, 2008-06-19 tle 6251 g figure 4 rxd during sleep mode
tle 6251 g final data sheet 13 rev. 3.3, 2008-06-19 split circuit the split circuitry is activate d during normal and rxonly mode and deactivated (split pin high ohmic) during sleep a nd standby mode. the split pin is used to stabilize the recessive common mode signal in normal mode and rxonly mode. this is realized with a st abilized voltage of 0.5 v cc at split. aea03399.vsd split termination tle 6251 g/ds canh canl split 10 nf tle 6251 g/ds canh canl split 60 60 split termination 10 nf split tle 6251 g/ds canl canh 10 nf 1.5 k 1.5 k can bus split termination at stub 60 60 figure 5 application example for the split pin a correct application of th e split pin is shown in figure 5 . the split termination for the left and right node is realized with two 60 resistances and one 10 nf capacitor. the center node in this example is a stub node and the recommended value for the split resistances is 1.5 k . diagnosis-flags at nerr and rxd power-up flag ? task: to signalize a power-up state at v bat
final data sheet 14 rev. 3.3, 2008-06-19 tle 6251 g ? indicator: nerr = low in rxonly mode ? remarks: power-up flag is cleared when entering the normal mode wake-up flag ? task: to signalize a wake-up condi tion at the wk pi n (filtering time t > t wk ) or via can bus message (filtering time t > t wu ) ? indicator: rxd or nerr = low in sleep/ stand-by mode immedi ately after wake-up ? remarks: flag is cleared on entering the rxonly mode wake-up source flag ? task: to distinguish betw een the two wake-up sources ? indicator: nerr = low in norma l mode = wake-up via wk pin ? remarks: only available if the power-up flag is cleared. after four recessive to dominant edges on txd in normal mode, the flag is cleare d. leaving the normal mode clears the wake- up source flag. bus failure flag ? task: to signalize a bus line s hort circuit condi tion to gnd, v s or v cc ? indicator: nerr = low in normal mode ? remarks: flag is set after four consecutive recessive to dominant cycles on pin txd when trying to drive the bus dominant. the bus fail ure flag is cleared if the normal mode is reentered or 4 recessive to dominant edges at txd without failure condition. local failure flag ? task: to signalize one of the five local failure conditi ons described in local failure-flags and -detection ? indicator: nerr = low in rxonly mode (local failure flag is set) ? remarks: the flag is cleared when entering the normal mode from rxonly mode or when rxd is dominant while txd is recessive.
tle 6251 g final data sheet 15 rev. 3.3, 2008-06-19 local failure-flags and -detection txd dominant failure detection ? effect: permanent dominant signal for t > t txd at txd ? indicator: nerr = low in rxonly mode (local failure flag is set) ? action: disabling of the transmitter stage ? remarks: release of the transmitter stage only after transition into rxonly mode (failure diagnosis) and transition into normal mode. rxd permanent re cessive clamping ? effect: internal rxd signal doe s not match signal at rxd pin because the rxd pin is pulled to high (permanent high) ? indicator: nerr = low in rxonly mode (local failure flag is set) ? action: disabling of the receiver stage ? remarks: the flag is cleared by changing from rxonly (failure diagnosis) into normal mode or rxd gets dominant. txd to rxd short circuit ? effect: short circuit between rxd and txd ? indicator: nerr = low in rxonly mode (local failure flag is set) ? action: disabling of the transmitter stage ? remarks: the flag is cleared by changing from rxonly (failure diagnosis) into normal mode. bus dominant clamping ? effect: permanent dominant signal at the can bus for t > t bus ? indicator: nerr = low in rxonly mode (local failure flag is set) ? action: none ? remarks: none overtemperature detection ? effect: junction temperature at the driving stages exceeded ? indicator: nerr = low in rxonly mode (local failure flag is set) ? action: disabling of the transmitter stage ? remarks: the flag is cleared by changing from rxonly (failure diagnosis) into normal mode or rxd gets dominant. bus only released after the next dominant bit in txd.
final data sheet 16 rev. 3.3, 2008-06-19 tle 6251 g other features v c -level adapter the advantage of the adaptive c logic is the ratiometrical sca ling of the i/o levels depending on the input voltage at the v c pin. so it can be ensured that the i/o voltage of the c fits to the internal logic levels of the tle 6251 g. wake input the wake-up input pin is a bi-lev el sensitive input. this means that both transitions, high to low and low to high, result in a wake-up. v cc , v c undervoltage detection if an undervoltage condition at v cc , v c is detected for longer than t = t uv,t , the tle 6251 g automatically transfers into the sleep mode and the unde rvoltage flag is set. th is flag is an internal flag and not available via nerr or rxd. the flag is cleared again, after setting the power on or wake flag (power-up or wake-up). v s undervoltage detection if an undervoltage condition at v s is detected, the tle 6251 g immediately transfers into the standby mode and the undervoltage flag is set. this flag is an inte rnal flag and not available via nerr or rxd. the flag is cleare d again, after the supply voltage v s has reached the nominal value.
aea03400.vsd en nstb ihh 1 1 high normal mode undervoltage at v cc / v c for t > t uv,t en nstb inh 0 0 high stand-by undervoltage at v s t < t hslp t > t hslp wake-up: t > t wk t > t wu en nstb ihn 0 0 float. sleep start up power up power down en nstb inh 0 1 high receive-only go to sleep nstb en 0 1 tle 6251 g final data sheet 17 rev. 3.3, 2008-06-19 figure 6 mode state diagram
table 2truth table nstb en inh mode event nerr rxd split 1 1 high normal no can bus failure 1) only valid after at least four recessive to dom inant edges at txd after entering the normal mode. 1) 1 low: bus dominant, high: bus recessive on can bus failure 1) 0 canh/canl driver off 2) due to an thermal overtemperature shutdown or txd time-out. 2) 1 wake-up via can bus/no wake-up request detected 1 wake-up via pin wk 3) only valid before four recessive to dominan t edges at txd after en tering the normal mode. 3) 0 1 0 high receive only no v bat fail detected 4) power on situation, valid if v cc and v c is active and transition from sl eep, stand-by or goto sleep command. 4) 1 low: bus dominant, high: bus recessive on v bat fail detected 4) 0 no txd time-out, overtemperature, rxd recessive clamping or bus dominant time out detected 5) transition from normal mode. 5) 1 txd time-out, overtemperature, rxd recessive clamping or bus dominant time out detected 5) 0 0 0 high stand by wake-up reque st detected 6) only valid if v cc and v c are active. 6) 0 0 off no wake up request detected 6) 1 1 0 1 7) if this mode is selected for a time longer than the hold time of the go-to sleep command ( t > t hslp ), inh is floating. high 7) go to sleep wake-up reque st detected 6) 0 0 off no wake-up request detected 6) 1 1 0 0 floating sleep 8) wake-up reque st detected 6) 0 0 off no wake-up request detected 6) 1 1 final data sheet 18 rev. 3.3, 2008-06-19 tle 6251 g
tle 6251 g final data sheet 19 rev. 3.3, 2008-06-19 8) transition into the sleep mode only if go-to sleep command was selected for a time longer than the hold time of the go- to sleep command ( t > t hslp ).
table 3 absolute maximum ratings parameter symbol limit values unit remarks min. max. voltages supply voltage v s -0.3 40 v ? 5 v supply voltage v cc -0.3 5.5 v ? logic supply voltage v c -0.3 5.5 v ? can bus voltage (canh, canl) v canh/l -27 40 v ? differential voltage canh, canl, split, wk v diffesd - 40 40 v canh - canl < |40 v|; canh - split < |40 v| canl - split < |40 v|; canl - wk < |40 v|; canh - wk < |40 v|; split - wk < |40 v| v split input voltage v split -27 40 v ? input voltage at wk v wk -27 40 v ? input voltage at inh v inh -0.3 v s + 0.3 v ? logic voltages at en, nstb, nerr, txd, rxd v i -0.3 v c v 0 v < v c < 5.5 v electrostatic discharge voltage at split v esd -1 1 kv human body model (100 pf via 1.5 k ) electrostatic discharge voltage at canh, canl, wk vs. gnd v esd -6 6 kv human body model (100 pf via 1.5 k ) electrostatic discharge voltage for all pin except split v esd -2 2 kv human body model (100 pf via 1.5 k ) electrostatic discharge voltage at canh, canl vs. gnd v esd -6 6 kv according to iec61000-4-2 (150 pf via 330 ) see figure 10 1) application circuits with and without terminated split pin 1) temperatures storage temperature t j -40 150 c ? final data sheet 20 rev. 3.3, 2008-06-19 tle 6251 g note: maximum ratings are absolute ratings; exceeding any one of thes e values may cause irreversible damage to the integrated circuit.
table 4 operating range parameter symbol limit values unit remarks min. max. supply voltage v s 5 40 v ? 5 v supply voltage v cc 4.75 5.25 v ? logic supply voltage v c 3.0 5.25 v ? junction temperature t j -40 150 c ? thermal resistances junction ambient r thj-a ? 120 k/w 1) calculation of the junction temperature t j = t amb + p r thj-a 1) thermal shutdown (junction temperature) thermal shutdown temp. t jsd 150 190 c ? thermal shutdown hyst. t ? 10 k ? tle 6251 g final data sheet 21 rev. 3.3, 2008-06-19
final data sheet 22 rev. 3.3, 2008-06-19 tle 6251 g table 5 electrical characteristics 4.75 v < v cc < 5.25 v; 3.0 v < v c < 5.25 v; 6.0 v < v s < 40 v; r l = 60 ? ; normal mode; -40 c < t j < 150 c; all voltages with respect to ground; pos itive current flowing into pin; unless otherwise specified. parameter symbol limit values unit test condition min. typ. max. current consumption current consumption normal mode i cc+c ? 6 10 ma recessive state; txd = high i cc+c ? 50 80 ma dominant state; txd = low current consumption rxd only mode i cc+c ? 6 10 ma receive only mode current consumption stand-by mode i vs ? 25 50 a stand-by mode; v s = wk = 12 v i cc+c ? 25 60 a stand-by mode; v s = wk = 12 v v cc = v c = 5v current consumption sleep mode i vs ? 25 35 a sleep mode, v s = 12 v, t j < 85 c, v cc = v c = 0 v i cc+c ? 2.5 10 a sleep mode, v s = 12 v, t j < 85 c, v cc = v c = 5v supply resets v cc undervoltage detection v cc,uv 2 3 4 v ? v c undervoltage detection v c,uv 0.4 1.2 1.8 v ? v s power on detection level v s,pon 2 4 5 v ? v s power off detection level v s,poff 2 3.5 5 v ? receiver output rxd high level output current i rd,h ? -4 -2 ma v rd = 0.8 v c low level output current i rd,l 2 4 ? ma v rd = 0.2 v c short circuit current i sc,rxd ? 70 84 ma v c = 5.25 v, rxd = low
tle 6251 g final data sheet 23 rev. 3.3, 2008-06-19 short circuit current i sc,rxd ? 35 45 ma v c = 3.3 v, rxd = low table 5 electrical characteristics (cont?d) 4.75 v < v cc < 5.25 v; 3.0 v < v c < 5.25 v; 6.0 v < v s < 40 v; r l = 60 ? ; normal mode; -40 c < t j < 150 c; all voltages with respect to ground; pos itive current flowing into pin; unless otherwise specified. parameter symbol limit values unit test condition min. typ. max.
final data sheet 24 rev. 3.3, 2008-06-19 tle 6251 g transmission input txd high level input voltage threshold v td,h ? 0.52 v c 0.7 v c v recessive state low level input voltage threshold v td,l 0.30 v c 0.48 v c ? v dominant state txd input hysteresis v td,hys 100 400 1000 mv not subject to production test specified by design. high level input current i td -5 0 5 a v txd = v c txd pull-up resistance r td 10 20 40 k ? ? mode control inputs en, nstb high level input voltage threshold v m,h ? 0.52 v c 0.7 v c v ? low level input voltage threshold v m,l 0.30 v c 0.48 v c ? v ? input hysteresis v m,hys 100 400 1000 mv not subject to production test specified by design. low level input current i md -5 0 5 a v en / v nstb = 0v pull-down resistance r m 10 20 40 k ? ? diagnostic output nerr high level output voltage v nerr,h 0.8 v c ? ? v i nerr = -100 a low level output voltage v nerr,l ? ? 0.2 v c v i nerr = 1.25 ma short circuit current i sc,nerr ? 20 48 ma v c = 5.25 v short circuit current i sc,nerr ? 13 25 ma v c = 3.3 v table 5 electrical characteristics (cont?d) 4.75 v < v cc < 5.25 v; 3.0 v < v c < 5.25 v; 6.0 v < v s < 40 v; r l = 60 ? ; normal mode; -40 c < t j < 150 c; all voltages with respect to ground; pos itive current flowing into pin; unless otherwise specified. parameter symbol limit values unit test condition min. typ. max.
tle 6251 g final data sheet 25 rev. 3.3, 2008-06-19 termination output split split output voltage v split 0.3 v cc 0.5 v cc 0.7 v cc v normal mode; -500 a < i split < 500 a v split 0.45 v cc 0.5 v cc 0.55 v cc v normal mode; no load leakage current i split -5 0 5 a sleep mode v cc = v c = 0 v output resistance r split ? 600 ? ? ? wake input wk wake-up threshold voltage v wk,th v s - 4 v s - 2.5 v s - 2 v v nstb = 0 v high level input current i wkh ? 5 10 a v wk = v wk,th + 1 low level current i wkl -10 -5 ? a v wk = v wk,th - 1 inhibit output inh high level voltage drop ? v h = v s - v inh ? v h ? 0.4 0.8 v i inh = -1 ma leakage current i inh,lk ? ? 5 a sleep mode; v inh = 0 v bus transmitter canl/canh recessive output voltage v canl/h 2.0 ? 3.0 v no load canh, canl recessive output voltage difference v diff -500 ? 50 mv v txd = v c ; no load canl dominant output voltage v canl 0.5 ? 2.25 v v txd = 0 v; canh dominant output voltage v canh 2.75 ? 4.5 v v txd = 0 v canh, canl dominant output voltage difference v diff 1.5 ? 3.0 v v txd = 0 v table 5 electrical characteristics (cont?d) 4.75 v < v cc < 5.25 v; 3.0 v < v c < 5.25 v; 6.0 v < v s < 40 v; r l = 60 ? ; normal mode; -40 c < t j < 150 c; all voltages with respect to ground; pos itive current flowing into pin; unless otherwise specified. parameter symbol limit values unit test condition min. typ. max.
final data sheet 26 rev. 3.3, 2008-06-19 tle 6251 g canl short circuit current i canlsc 50 80 200 ma v canlshort = 18 v canh short circuit current i canhsc -200 -80 -50 ma v canhshort = 0 v leakage current i canhl,lk -5 0 5 a v s = v c = v cc = 0 v; 0 v < v canh,l < 5 v bus receiver differential receiver threshold voltage, normal mode v diff,rdn ? 0.8 0.9 v see cmr v diff,drn 0.5 0.6 ? v see cmr differential receiver threshold, low power mode v diff,rdlp 0.9 1.15 v recessive to dominant v diff,drlp 0.4 0.8 v dominant to recessive common mode range cmr -12 ? 12 v v cc = 5 v differential receiver hysteresis v diff,hys ? 200 ? mv ? canh, canl input resistance r i 10 20 30 k ? recessive state differential input resistance r diff 20 40 60 k ? recessive state dynamic can-transceive r characteristics min. hold time go to sleep command t hslp 8 25 50 s ? min. wake-up time on pin wk t wk 5 10 20 s ? min. dominant time for bus wake-up t wu 0.75 3 5 s ? propagation delay txd-to-rxd low (recessive to dominant) t d(l),tr ? 150 255 ns c l = 47 pf; r l = 60 ? ; v cc = v c = 5 v; c rxd = 15 pf table 5 electrical characteristics (cont?d) 4.75 v < v cc < 5.25 v; 3.0 v < v c < 5.25 v; 6.0 v < v s < 40 v; r l = 60 ? ; normal mode; -40 c < t j < 150 c; all voltages with respect to ground; pos itive current flowing into pin; unless otherwise specified. parameter symbol limit values unit test condition min. typ. max.
tle 6251 g final data sheet 27 rev. 3.3, 2008-06-19 propagation delay txd-to-rxd high (dominant to recessive) t d(h),tr ? 150 255 ns c l = 47 pf; r l = 60 ? ; v cc = v c = 5 v; c rxd = 15 pf propagation delay txd low to bus dominant t d(l),t ? 50 105 ns c l = 47 pf; r l = 60 ? ; v cc = v c = 5 v propagation delay txd high to bus recessive t d(h),t ? 50 105 ns c l = 47 pf; r l = 60 ? ; v cc = v c = 5 v propagation delay bus dominant to rxd low t d(l),r ? 50 150 ns c l = 47 pf; r l = 60 ? ; v cc = v c = 5 v; c rxd = 15 pf propagation delay bus recessive to rxd high t d(h),r ? 100 150 ns c l = 47 pf; r l = 60 ? ; v cc = v c = 5 v; c rxd = 15 pf txd permanent dominant disable time t txd 0.3 0.6 1.0 ms ? bus permanent time-out t bus,t 0.3 0.6 1.0 ms ? v cc , v c undervoltage filter time t uv,t 50 80 120 ms ? table 5 electrical characteristics (cont?d) 4.75 v < v cc < 5.25 v; 3.0 v < v c < 5.25 v; 6.0 v < v s < 40 v; r l = 60 ? ; normal mode; -40 c < t j < 150 c; all voltages with respect to ground; pos itive current flowing into pin; unless otherwise specified. parameter symbol limit values unit test condition min. typ. max.
final data sheet 28 rev. 3.3, 2008-06-19 tle 6251 g diagrams aea03401.vsd 5 gnd 2 4 14 6 1 9 wk 10 canh 60 47 pf 15 pf v c nstb en txd rxd 3 v cc 100 nf 100 nf = 5 v = 3...5 v v s 100 nf 13 12 canl figure 7 test circuit for dynamic characteristics t d(l),r t v diff t d(l),tr t d(h),r t d(h),tr t d(l),t t gnd v txd v c t d(h),t v diff(d) v diff(r) aet03402.vsd t gnd 0.2 x v c 0.8 x v c v rxd v c figure 8 timing diagrams for dy namic characteristics
tle 6251 g final data sheet 29 rev. 3.3, 2008-06-19 application ecu ecu aea03396.vsd p with on chip can module e.g. c164c c167c gnd tle 6251 g wk 9 gnd 2 100 nf 100 nf 100 nf 10 k canh 13 1) 51 h canl 12 v s split 11 inh 7 10 100 nf e.g. tle 4476 (3.3/5 v) or tle 4471 tle 4276 tle 4271 gnd v s 6 14 8 en nstb nerr 4 rxd 1 txd 5 v c 3 v cc v q2 inh v i1 + 22 f + 22 f 5 v 100 nf + 22 f v q1 stb 8 rxd 4 txd 1 3 v cc tle 6251 gs gnd 2 canh 7 1) 51 h canl 6 split 5 e. g. tle 4270 v q v i gnd p with on chip can module e.g. c164c c167c gnd 100 nf 100 nf + 22 f 5 v 100 nf + 22 f 60 can bus 60 v bat 4.7 nf 1) 60 60 4.7 nf 1) 1) optional, according to the car manufacturer requirements figure 9 application circuit example
esd testing.vsd tle 6251 g canh canl split 60 60 22 nf case 2 100nf vs 100nf vcc 100nf vio tle 6251 g canh canl split 30 30 case 3 100nf vs 100nf vcc 100nf vio tle 6251 g canh canl split case 4 100nf vs 100nf vcc 100nf vio tle 6251 g canh canl split 30 30 47 nf case 1 100nf vs 100nf vcc 100nf vio final data sheet 30 rev. 3.3, 2008-06-19 tle 6251 g figure 10 esd test for conformance to iec 61000-4-2 the 100nf decoupling capacitors on vs, vio and vcc are situated 5mm from the pins. the distance between the fixpoint where the g un is applied and the pin can_h and can_l are 20mm. the test has been realized with noiseken ess2000.
tle 6251 g final data sheet 31 rev. 3.3, 2008-06-19 package outlines 0.2 does not include plastic or metal protrusion of 0.25 max. per side index marking -0.06 1.27 +0.08 0.41 +0.05 -0.11 8.69 1 14 7 1) b 0.254 8 b m 0.1 0.25 (1.47) -0.15 c 14x c 6 4 1.75 max. +0.05 1) -0.13 -0.23 14x 0.254 +0.25 0.64 a m 0.2 +0.05 a -0.01 0.33 x 45? 8? 1) max. gps09330 figure 11 p-dso-14-13 (plastic dual small outline) you can find all of our packages, sorts of packing and others in our infineon internet page ?products?: http://www.infineon.com/products . dimensions in mm smd = surface mounted device
final data sheet 32 rev. 3.3, 2008-06-19 tle 6251 g revision history version date changes rev. 3.3 2008-06-19 initial version rev 3.2. ordering code outdated! page 3: change ordering code to: on request

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